TSMC 3nm, 250 million transistors per square millimeter and still with FinFET

Alongside its quarterly financial report, the TSMC reported on the development of new manufacturing technologies. According to the company, the introduction of the 5nm method is not threatened by the new coronavirus epidemic, the previous target dates will be more or less sustainable, but mass production at the 3nm hub will be delayed by half a year, so the new target date is the second half of 2022.

In short, the problem is that the delivery of the EUV equipment needed for production is stalled, so production may be slower.

According to TSMC, one target for the 3nm manufacturing process is to be able to pack 250 million transistors per square millimeter. This is a pretty amazing figure, but it should be added that not all circuits can be placed so close together, so the transistor density will be lower on real chips.

More importantly, unlike the original plans, TSMC is not introducing the GAAFET transistor structure, but will remain with FinFET. The contract manufacturer explains this by saying that the latter is better, has better performance characteristics and allows cheaper production. However, there is also a drawback that the company has not discussed, namely scalability. The FinFET is already amazingly close to its limits at 3nm, so even when the feasibility is solved, there is no room for improvement.

The aforementioned points could make the race on a 3nm node exciting, as Samsung will switch to GAAFET, so it might be worth comparing who has made the better decision on this issue.