AMD’s latest slide package reveals much about the company’s plans for the future, from chip design to three-dimensional memories.
At the HPC Oil and Rice Gas Conference, AMD’s Forrest Norrod organized a presentation entitled “Evolving System Design for HPC: Next Generation CPU and Accelerator Technologies”, in which he talked about the future design of AMD hardware with several interesting slides.
In this presentation, Norrod explained why the multi-chip approach was necessary at EPYC and why his chip-based approach is the way forward for his second generation EPYC processors. There was also a brief reference to 3D memory technologies, pointing to a technology that seems to go beyond HBM2.
AMD comments that the transition to smaller nodes is not sufficient to produce chips with more transistors and higher power. The industry needed a way to scale products to achieve higher performance while achieving high silicon yields and low product prices. This is where AMD’s MCM (Multi-Chip Module) designs come in, enabling the company’s first-generation EPYC processors to scale to 32 cores and 64 threads with four interconnected 8-core processors.
As the slide show shows, in the next step processors with a chip design, a further development of MCM, are used. The second generation EPYC products from AMD and the third generation Ryzen products will offer higher scalability and enable each piece of silicon to be optimized for the best latency and performance characteristics.
Perhaps the most exciting part of the AMD slides is the “memory innovation”, which explicitly mentions “On-Die 3D Stacked Memory”. This feature is “under development” and should not be expected in any of the upcoming releases, but points to a future where AMD really does have three-dimensional chip designs. It is possible that AMD will develop some kind of low-latency memory, similar to Intel’s Forveros.
On the next slide, AMD explains that support for CCIX and GenZ will “soon come”, suggesting (but not confirming) that the company’s Zen 2 products will support these new interconnection standards.
Intel announced its CXL connectivity standard earlier this week, but it looks like AMD is switching from it to CCIX and GenZ.
In mid-2019, AMD plans to launch the EPYC “ROME” series of processors, the world’s first 7nm data center CPU, which is said to offer twice as much power per sockets. The third generation of Ryzen- and Navi-based graphics cards is also expected.