Samsung has officially validated and certified the Cadence and Synopsys design tools, which cover the entire design flow of a chip to be manufactured according to the company’s 5nm EUV process so that chips can now be developed for this process.
Samsung 5nm lithography
The certified tools were Synopsys Fusion Design Platform and Cadence Full-Flow Digital Solution. Both cover the entire flow of the ARM Cortex A53 or A57 core processor design, and these tools not only meet Samsung’s design requirements but also offer optimal power consumption, performance and design range. Remember that the 5nm EUV allows you to use 25% less space with 20% less power consumption or 10% more power.
This certification is a breakthrough in Samsung’s 5nm EUV process, for which the manufacturing process was approved 3 months ago, and now you have the other big part, the design process to manufacture. The company is working at full speed in its 5nm factories, which are expected to come on stream in 2020.