We have more revelations about AMD, this time about Genoa-X and Turin, the company’s upcoming architectures for the data center segment. We can preview that big cache advances are coming for these processors.
EPYC Genoa-X (Zen 4) will feature 1GB of L3 cache
AMD confirms that EPYC Genoa-X, based on Zen 4 cores, features more than 1GB of L3 cache, which means a big increase in the buffer memory. The EPYC ‘Genoa-X’ generation of processors is going to be released in 2023 with 3D V-Cache technology, which allows such amounts of memory to be added to the CPU.
The 4th generation AMD EPYC CPU family will not only feature the Genoa and Bergamo silicon but also Genoa-X and Siena. So the entire family will include four different variants of Zen 4-based processors, which is a bit dizzying, although it should be noted that these processors are intended for a different market than ours.
Genoa-X will feature 3D V-Cache technology listed with over 1 GB of L3 cache, significantly more than the 768 MB currently found in the EPYC Milan-X processors. With the SP5 socket, the next generation will support DDR5 memory as well as PCIe 5.0 and CXL interfaces. The maximum number of cores it will be able to offer is 96, always based on Zen 4.
AMD has taken the opportunity to confirm that the 5th generation of EPYC ‘Turin’ processors will be launched in 2024, although it is not mentioned which core it will use if it will be Zen 4 or Zen 5, which will be activated that year for the home market.
Where there are surprises in a new series called “Siena”, which is new custom silicon designed specifically for the telecom market, with a maximum capacity of 64 cores. That’s it for now.