NVIDIA Lovelace, NVIDIA Lovelace will be similar to Ampere, boost future GPU ray tracing performance by 20%,

NVIDIA Lovelace will be similar to Ampere, boost future GPU ray tracing performance by 20%

According to the source, Ada Lovelace will improve compute density and double ray tracing performance. It could be that NVIDIA’s SMs have been reworked at the design level, but according to this information, there is little else. The RTX 4000 will be a more powerful RTX 3000, as NVIDIA Lovelace would be similar to Ampere. Some things would change, but there are already rumors about RTX 30 on “steroids”, will it be true?

We call the news a rumor because in the history of NVIDIA we have not seen many generations in a row that are the same. It’s true that NVIDIA hasn’t developed a Kepler package in a while, the closest being the GTX 16 generation with Turing. Since Maxwell, they’ve had a pretty major generational shift in architecture.

NVIDIA Lovelace would be the same as Ampere with more power.

The switch from 8nm to 5nm must be important for NVIDIA, but it seems that the performance increase would not come from Lovelace. Architectures make a difference in games, which we saw with the RX Vega and Radeon VII, which featured HBM2 memory but were beaten by competitors with GDDR6.

Where does this come from? Greymon55 strikes again, claiming that “the Lovelace architecture doesn’t change much” when asked how Navi3 will compete with NVIDIA’s 5nm. Another NVIDIA-specific leaker named @kopite7kimi, who you may have seen here before, already claimed that Lovelace will be like Ampere in 2021.

The RTX 3090 comes with 7 GPCs and 84 SMs, while the RTX 4090 could come with 12 GPCs and 144 SMs, which is a brutal increase at the hardware level. However, many point out that all RTX 4070, 4080, and 4090 would be a “copy” of their predecessors with a 5nm node manufactured by TSMC.

The uptick in processing provides the opportunity to significantly increase performance: NVIDIA graphics cards feature more and more cores. At Turing, we saw the RTX 2080 Ti with 6 GPC, 36 TPC, 72 SMS, and 4608 CUDA cores; Ampere came with the RTX 3090 with 7 GPC, 42 TPC, 84 SMS, and 10,752 CUDA cores; now NVIDIA Ada Lovelace would come with an RTX 4090 with 12 GPC, 72 TPC, 144 SMS, and 18,432 CUDA cores.

The first had 12nm chips, the second 8nm chips, and the third 5nm chips… which would certainly allow for the scaling we talked about earlier. The flip side of the coin has already been discussed here: the power consumption, which rises to over 500 watts for the GPU alone. Of course, we are talking about the RTX 4090, but this increase in power consumption will be generalized.

In summary, no major architectural changes are expected from Lovelace. Something else would be NVIDIA Hopper, an architecture that could feature an MCM design in the chips, like RDNA 3 (only in the most powerful models).

NVIDIA’s GTC 2022 is still pending, but almost all media reports point to August-September 2022 as the launch date for the NVIDIA RTX 40. In contrast, the AMD RX 7000 would appear at a very similar time to compete with the green team.

A research paper describes a new technology called Subwarp Interleaving, which could lead to a performance increase of up to 20%.

Of course, this is a big jump – albeit a best-case scenario, since performance varies from game to game, as always – with an average potential gain of about 6.3% measured on a microarchitecture-enhanced Turing GPU.” as reported by Tom’s Hardware.

So that’s a nice boost, and there could be even bigger improvements for some titles. It’s important to note that this work is still in its early stages, and the architectural tweaks needed to introduce this feature may not be implemented until after the next generation of graphics cards – meaning that the next series after the RTX 4000 “Lovelace” card, presumably the RTX 5000, will be released later in 2022.

The subwarp interleaving method used is described in a research paper found by Twitter user 0x22h. In it, it is described as an “architectural improvement …… that uses thread divergence to hide divergent parts of workloads with low warp utilization in pipeline states.”

This is jargon that sounds like the Star Trek stuff about “warping”, but all you really need to know is that this is a new idea in microarchitecture that basically changes the way an element of microarchitecture is executed. Design Blocks.