NVIDIA Jetson Xavier SOC Mini-PC designed for IA

NVIDIA Jetson Xavier is the first SOC of its kind announced at CES 2018 and the largest SOC to date. We received a handful of details about the Xavier SOC when it was announced, but it seems that much more information has been posted on the Jetson Xavier DevKit website. A mini-PC specially designed for AI, robotics and other specific tasks.

NVIDIA Jetson Xavier devkit to be released in August for $1299

jetson Xavier, NVIDIA Jetson Xavier SOC Mini-PC designed for IA, Optocrypto
First of all, the design of the devkit is important. The devkit comes in two modules, one is the Jetson Xavier support board which includes all the connectivity options and the other is the Jetson Xavier module itself. When we purchased the kit, we received the two modules, the cables and the power adapter inside the package. The module measures 100mm x 87mm and 16mm in height. With the support plate, the complete package measures 105 mm x 105 mm.

NVIDIA mentioned that the Xavier SOC is built on a 12 nm TSMC process node that houses 9 billion transistors in a 350 mm2 matrix area.

To connect to the motherboard, NVIDIA uses a 699-pin connector that supports all types of high-speed I/O, including PCIe 4.0. This is the first NVIDIA platform to officially support PCIe 4.0 and enables transfer speeds of up to 56 Gb/sec, twice the speed required by Jetson Xavier SOC. NVIDIA also mentioned that the connector is not only designed to support PCIe 4.0 but also future I/O standards and allows compatibility with future Jetson modules.

jetson Xavier, NVIDIA Jetson Xavier SOC Mini-PC designed for IA, Optocrypto
In terms of specifications, Xavier’s SOC includes the Carmel ARM64 custom-built NVIDIA Carmel CPU, which houses 8 cores in a superscalar architecture. Features such as functional safety, dual execution, parity, and ECC are available on the CPU itself. Inside the array is also a Volta GPU containing 512 CUDA cores. The Volta GPU is capable of performing FP32, FP16, and INT8 computations as needed in a highly accurate environment. The chip provides 1.3 TFLOPs of maximum performance FP32 and 20 Tensor core TOPs.

Specifications and comparison with previous SOCs

FIRST NAME NVIDIA DRIVE PX NVIDIA DRIVE PX 2 NVIDIA DRIVE XAVIER
SOC Tegra X1 Parker Xavier
Technology 20nm SOC 16nm FinFET 12nm FinFET
CPU 8 Core CPU 12 Core CPU 8 Core CPU
CPU Architecture 4 x A57
4 x A53 (Custom)
8 x A57
4 x Denver2
Carmel ARM64 8 Core CPU (8 MB L2 + 4 MB L3)
GPU Architecture Maxwell (256 Core) Pascal (256 Core) Volta (512 Core)
Compute DLTOPs N / A 20 DLTOPs 30 TOPs
Total Chips 2 x Tegra X1 2 x Tegra X2
2 x Pascal MXM GPUs
1 x Xavier
Memory LPDDR4 8 GB LPDDR4 (50+ GB / s) 16 GB 256-bit LPDDR4
GPU memory N / A 4 GB GDDR5 (80+ GB / s) 137 GB / s
TDP 20W 80W 30W

The full package costs about $ 1299 and will be available in August.

 

 Source

Wccftech